REVISIONS
LTR
E
DESCRIPTION
Add vendor CAGE F8859. Add device class V criteria. Correct data limits in
paragraph 1.3 and I
IN
test conditions in table I. Add case outline X. Add table
III, delta limits. Update boilerplate. jak
Correct data in table II. Update boilerplate to MIL-PRF-38535 requirements.
- jak
Correct table II. 鈥?jak
DATE (YR-MO-DA)
00-07-12
APPROVED
Monica L. Poelking
F
01-12-04
Thomas M. Hess
G
02-02-04
Thomas M. Hess
First page of this drawing has been changed
CURRENT CAGE CODE 67268
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
F
15
F
16
REV
SHEET
G
1
F
2
F
3
F
4
F
5
F
6
F
7
F
8
F
9
F
10
F
11
F
12
F
13
G
14
PREPARED BY
Rodger Mell
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
http://www.dscc.dla.mil
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
CHECKED BY
D. A. DiCenzo
APPROVED BY
N. A. Hauck
DRAWING APPROVAL DATE
84-10-10
REVISION LEVEL
G
MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, OCTAL
BUFFER WITH THREE-STATE OUTPUTS, MONOLITHIC
SILICON
SIZE
CAGE CODE
A
SHEET
14933
1
OF
16
84096
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E211-02