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REVISIONS

LTR

C

DESCRIPTION

Add vendor CAGE F8859. Add device class V criteria. Correct data limits in

paragraph 1.3. Add table III, delta limits. Add case outline X. Update

boilerplate. - jak

Correct table II. Update boilerplate to MIL-PRF-38535 requirements. 鈥?jak

DATE (YR-MO-DA)

00-07-18

APPROVED

Monica L. Poelking

D

02-02-14

Thomas M. Hess

First page of this drawing has been changed

CURRENT CAGE CODE 67268

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

D

15

D

16

REV

SHEET

D

1

D

2

D

3

D

4

D

5

D

6

D

7

D

8

D

9

D

10

D

11

D

12

D

13

D

14

PREPARED BY

Donald R. Osborne

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216

http://www.dscc.dla.mil

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

AMSC N/A

CHECKED BY

D. A. DiCenzo

APPROVED BY

N. A. Hauck

DRAWING APPROVAL DATE

84-11-01

REVISION LEVEL

D

MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, OCTAL

BUS TRANSCEIVER WITH THREE-STATE OUTPUTS,

MONOLITHIC SILICON

SIZE

CAGE CODE

A

SHEET

14933

1

OF

16

84085

DSCC FORM 2233

APR 97

DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.

5962-E208-02

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