鈩?/div>
output control and undershoot corrector in addition to
a split ground bus for superior performance.
n
Guaranteed simultaneous switching noise level and
dynamic threshold performance
n
Improved latch-up immunity
n
Buffered positive edge-triggered clock
n
TRI-STATE outputs drive bus lines or buffer memory
address registers
n
Outputs source/sink 24 mA
n
Faster prop delays than the standard 鈥橝C/鈥橝CT374
n
4 kV minimum ESD immunity
n
Standard Military Drawing (SMD)
鈥?鈥橝CTQ374: 5962-92189
鈥?鈥橝CQ374: 5962-92179
Features
n
I
CC
and I
OZ
reduced by 50%
Logic Symbols
Connection Diagrams
Pin Assignment for DIP
and Flatpak
DS100239-1
IEEE/IEC
DS100239-3
Pin Assignment for LCC
DS100239-2
DS100239-4
GTO
鈩?/div>
is a trademark of National Semiconductor Corporation.
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
FACT
廬
is a registered trademark of Fairchild Semiconductor Corporation.
FACT Quiet Series
鈩?/div>
is a trademark of Fairchild Semiconductor Corporation.
漏 1998 National Semiconductor Corporation
DS100239
www.national.com
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