鈩?/div>
output control and undershoot corrector in addition to
a split ground bus for superior performance.
Features
n
I
CC
and I
OZ
reduced by 50%
n
Guaranteed simultaneous switching noise level and
dynamic threshold performance
n
Improved latch up immunity
n
Eight latches in a single package
n
TRI-STATE outputs drive bus lines or buffer memory
address registers
n
Outputs source/sink 24 mA
n
Faster prop delays than the standard 鈥橝C/鈥橝CT373
n
4 kV minimum ESD immunity (鈥橝CQ)
n
Standard Military Drawing (SMD)
鈥?鈥橝CTQ373: 5962-92188
鈥?鈥橝CQ373: 5962-92178
Logic Symbols
IEEE/IEC
DS100238-1
DS100238-2
Pin Names
D
0
鈥揇
7
LE
OE
O
0
鈥揙
7
Data Inputs
Description
Latch Enable Input
Output Enable Input
TRI-STATE Latch Outputs
GTO
鈩?/div>
is a trademark of National Semiconductor Corporation.
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
FACT
廬
is a registered trademark of Fairchild Semiconductor Corporation.
FACT Quiet Series
鈩?/div>
is a trademark of Fairchild Semiconductor Corporation.
漏 1998 National Semiconductor Corporation
DS100238
www.national.com
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