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54AC646 Datasheet

  • 54AC646

  • Octal Transceiver/Register with TRI-STATE Outputs

  • 10頁

  • NSC

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54AC646 Octal Transceiver/Register with TRI-STATE Outputs
August 1998
54AC646
Octal Transceiver/Register with TRI-STATE
廬
Outputs
General Description
The 鈥橝C646 consist of registered bus transceiver circuits,
with outputs, D-type flip-flops and control circuitry providing
multiplexed transmission of data directly from the input bus
or from the internal storage registers. Data on the A or B bus
will be loaded into the respective registers on the
LOW-to-HIGH transition of the appropriate clock pin (CPAB
or CPBA). The four fundamental data handling functions
available are illustrated in
Figures 1, 2, 3, 4.
n
n
n
n
n
n
Multiplexed real-time and stored data transfers
TRI-STATE outputs
300 mil slim dual-in-line package
Outputs source/sink 24 mA
鈥橝CT646 has TTL compatible inputs
Standard Microcircuit Drawing (SMD)
鈥?鈥橝C646: 5962-89682
Features
n
Independent registers for A and B buses
Logic Symbols
Pin Names
A
0
鈥揂
7
B
0
鈥揃
7
CPAB, CPBA
SAB, SBA
G
DS100231-1
Description
Data Register A Inputs
Data Register A Outputs
Data Register B Inputs
Data Register B Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
DIR
IEEE/IEC
DS100231-2
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
FACT
廬
is a registered trademark of Fairchild Semiconductor Corporation.
漏 1998 National Semiconductor Corporation
DS100231
www.national.com

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