54AC373L Datasheet

IC型號(hào)：
54AC373L
PDF描述：
Octal Transparent Latch with TRI-STATE Outputs
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169.71KB
PDF頁數(shù)：
10頁
芯片廠家：
NSC

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54AC373

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54ACT373 Octal Transparent Latch with TRI-STATE Outputs

August 1998

54AC373

鈥?/div>

54ACT373

Octal Transparent Latch with TRI-STATE

廬

Outputs

General Description

The 鈥橝C/鈥橝CT373 consists of eight latches with TRI-STATE

outputs for bus organized system applications. The flip-flops

appear transparent to the data when Latch Enable (LE) is

HIGH. When LE is LOW, the data that meets the setup time

is latched. Data appears on the bus when the Output Enable

(OE) is LOW. When OE is HIGH, the bus output is in the high

impedance state.

Features

and I

reduced by 50%

Eight latches in a single package

TRI-STATE outputs for bus interfacing

Outputs source/sink 24 mA

鈥橝CT373 has TTL-compatible inputs

Standard Microcircuit Drawing (SMD)

鈥?鈥橝C373: 5962-87555

鈥?鈥橝CT373: 5962-87556

Logic Symbols

IEEE/IEC

DS100329-1

DS100329-2

Pin Names

鈥揇

鈥揙

Description

Data Inputs

Latch Enable Input

Output Enable Input

TRI-STATE Latch Outputs

TRI-STATE

廬

is a registered trademark of National Semiconductor Corporation.

FACT

廬

is a registered trademark of Fairchild Semiconductor Corporation.

漏 1998 National Semiconductor Corporation

DS100329

www.national.com

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