5442A DM5442A DM7442A BCD to Decimal Decoders
June 1989
5442A DM5442A DM7442A
BCD to Decimal Decoders
General Description
These BCD-to-decimal decoders consist of eight inverters
and ten four-input NAND gates The inverters are connect-
ed in pairs to make BCD input data available for decoding
by the NAND gates Full decoding of input logic ensures
that all outputs remain off for all invalid (10鈥?5) input condi-
tions
Features
Y
Y
Y
Y
Y
Y
Diode clamped inputs
Also for application as 4-line-to-16-line decoders 3-line-
to-8-line decoders
All outputs are high for invalid input conditions
Typical power dissipation 140 mW
Typical propagation delay 17 ns
Alternate Military Aerospace device (5442A) is avail-
able Contact a National Semiconductor Sales Office
Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL F 6516 鈥?1
Order Number 5442ADMQB 5442AFMQB DM5442AJ DM5442AW or DM7442AN
See NS Package Number J16A N16E or W16A
Function Table
No
D
0
1
2
3
4
5
6
7
8
9
I
N
V
A
L
I
D
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
BCD Input
C
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
B
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
A
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
0
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
1
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
2
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
Decimal Output
3
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
4
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
5
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
6
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
7
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
8
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
9
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
e
High Level
L
e
Low Level
C
1995 National Semiconductor Corporation
TL F 6516
RRD-B30M105 Printed in U S A
1
2
3
4
5
6
