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4024B Datasheet

  • 4024B

  • (266.94 k)

  • 11頁

  • ETC

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上傳產(chǎn)品規(guī)格書

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HCC4020B/24B/40B
HCF4020B/24B/40B
RIPPLE-CARRY BINARY COUNTER/DIVIDERS
4020B - 14 STAGE
4024B -
7 STAGE
4040B - 12 STAGE
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MEDIUM-SPEED OPERATION
FULLY STATIC OPERATION
COMMON RESET
BUFFERED INPUTS AND OUTPUTS
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
5V, 10V, AND 15V PARAMETRIC RATINGS
INPUT CURRENT OF 100nA AT 18V AND
25擄C FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD No. 13A, 鈥漇TANDARD
SPECIFICATIONS FOR DESCRIPTION OF 鈥滲鈥?/div>
SERIES CMOS DEVICES鈥?/div>
EY
(Plastic Package)
F
(Ceramic Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC40XXBF
HCF40XXBM1
HCF40XXBEY
HCF40XXBC1
DESCRIPTION
The
HCC4XXXB
(extended temperature range)
and
HCF4XXXB
(intermediate temperature range)
are monolithic integrated circuits, available in 14-
lead dual in-line for
4024B
and 16-lead dual in-line
for
4020B, 4040B
plastic or ceramic package and
plastic micropackage.
PIN CONNECTIONS
4020B
The
HCC/HCF4020B, 4024B,
and
4040B
are ripple-
carry binary counters. All counter stages are master-
slave flip-flops. The state of a counter advances one
count on the negative transition of each input pulse ;
a high level on the RESET line resets the counter to
its all zeros stage. Schmitt trigger action on the input-
pulse line permits unlimited clock rise and fall times.
All inputs and outputs are buffered.
4024B
4040B
March 1989
1/11

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