Silicon Junction FETs (Small Signal)
2SJ0364
(2SJ364)
Silicon P-Channel Junction FET
For analog switch
unit: mm
(0.425)
I
Features
0.3
+0.1
鈥?.0
3
0.15
+0.10
鈥?.05
1.25
鹵0.10
2.1
鹵0.1
5擄
G
Low ON-resistance
G
Low-noise characteristics
1
2
I
Absolute Maximum Ratings
(Ta = 25擄C)
Parameter
Gate to Drain voltage
Drain current
Gate current
Allowable power dissipation
Channel temperature
Storage temperature
Symbol
V
GDS
I
D
I
G
P
D
T
ch
T
stg
Ratings
65
鈭?0
鈭?0
150
150
鈭?5
to +150
Unit
V
mA
mA
mW
擄C
擄C
10擄
(0.65) (0.65)
1.3
鹵0.1
2.0
鹵0.2
1: Source
2: Drain
3: Gate
0 to 0.1
0.9
鹵0.1
0.9
+0.2
鈥?.1
EIAJ: SC-70
SMini3-G1 Package
Marking Symbol (Example): 4M
I
Electrical Characteristics
(Ta = 25擄C)
Parameter
Drain to Source cut-off current
Gate to Source leakage current
Gate to Drain voltage
Gate to Source cut-off voltage
Forward transfer admittance
Drain to Source ON-resistance
Symbol
I
DSS*
I
GSS
V
GDS
V
GSC
| Y
fs
|
R
DS(on)
Conditions
V
DS
=
鈭?0V,
V
GS
= 0
V
GS
= 30V, V
DS
= 0
I
G
= 10碌A(chǔ), V
DS
= 0
V
DS
=
鈭?0V,
I
D
=
鈭?0碌A(chǔ)
V
DS
=
鈭?0V,
I
D
=
鈭?mA,
f = 1kHz
V
DS
=
鈭?0mV,
V
GS
= 0
V
DS
=
鈭?0V,
V
GS
= 0, f = 1MHz
1.8
65
1.5
2.5
300
12
4
3.5
min
鈭?/div>
0.2
typ
max
鈭?
10
Unit
mA
nA
V
V
mS
鈩?/div>
pF
pF
Input capacitance (Common Source) C
iss
Reverse transfer capacitance (Common Source) C
rss
*
I
DSS
rank classification
Runk
I
DSS
(mA)
O
鈭?/div>
0.2 to
鈭?
4MO
P
鈭?/div>
0.6 to
鈭?.5
4MP
Q
鈭?
to
鈭?
4MQ
R
鈭?.5
to
鈭?
4MR
Marking Symbol
Note) The part number in the parenthesis shows conventional part number.
0.2
鹵0.1
239
1
2
3
