DATA SHEET
SILICON TRANSISTOR
2SC5010
NPN SILICON EPITAXIAL TRANSISTOR
3 PINS ULTRA SUPER MINI MOLD
DESCRIPTION
The 2SC5010 is an NPN epitaxial silicon transistor designed for use in low noise and small signal amplifiers from
VHF band to L band. Low noise figure, high gain, and high current capability achieve a very wide dynamic range and
excellent linearity. This is achieved by direct nitride passivated base surface process (NEST3 process) which is an
NEC proprietary fabrication technique.
FEATURES
鈥?Low Voltage Use.
鈥?High f
T
鈥?Low C
re
鈥?Low NF
: 12.0 GHz TYP. (@ V
CE
= 3 V, I
C
= 10 mA, f = 2 GHz)
: 0.4 pF TYP. (@ V
CE
= 3 V, I
E
= 0, f = 1 MHz)
: 1.5 dB TYP. (@ V
CE
= 3 V, I
C
= 3 mA, f = 2 GHz)
2
1.6 鹵 0.1
1.0
0.2
+0.1
鈥?
0.5
0.3
+0.1
鈥?
0.15
+0.1
鈥?.05
PACKAGE DIMENSIONS
in milimeters
1.6 鹵 0.1
0.8 鹵 0.1
鈥?High |S
21e
|
2
: 8.5 dB TYP. (@ V
CE
= 3 V, I
C
= 10 mA, f = 2 GHz)
鈥?Ultra Super Mini Mold Package.
0.5
ORDERING INFORMATION
PART
NUMBER
2SC5010
2SC5010-T1
3
1
QUANTITY
50 pcs/Unit.
3 kpcs/Reel.
PACKING STYLE
Embossed tape 8 mm wide.
Pin3(Collector) face to perforation side
of the tape.
0.75 鹵 0.05
0.6
*
Please contact with responsible NEC person, if you require evaluation
sample. Unit sample quantity shall be 50 pcs.
ABSOLUTE MAXIMUM RATINGS (T
A
= 25 藲C)
Collector to Base Voltage
Collector to Emitter Voltage
Emitter to Base Voltage
Collector Current
Total Power Dissipation
Junction Temperature
Storage Temperature
V
CBO
V
CEO
V
EBO
I
C
P
T
T
j
T
stg
9
6
2
30
125
150
鈥?5 to +150
V
V
V
mA
mW
藲C
藲C
1. Emitter
2. Base
3. Collector
Document No. P10389EJ2V0DS00 (2nd edition)
(Previous No. TD-2401)
Date Published July 1995 P
Printed in Japan
0 to 0.1
漏
1993