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28C04AI/P Datasheet

  • 28C04AI/P

  • 4K (512 x 8) CMOS EEPROM

  • 10頁

  • MICROCHIP   MICROCHIP

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Obsolete Device
28C04A
4K (512 x 8) CMOS EEPROM
FEATURES
鈥?Fast Read Access Time鈥?50 ns
鈥?CMOS Technology for Low Power Dissipation
- 30 mA Active
- 100
碌A(chǔ)
Standby
鈥?Fast Byte Write Time鈥?00
碌s
or 1 ms
鈥?Data Retention >200 years
鈥?Endurance - Minimum 10
4
Erase/Write Cycles
- Automatic Write Operation
- Internal Control Timer
- Auto-Clear Before Write Operation
- On-Chip Address and Data Latches
鈥?Data Polling
鈥?Chip Clear Operation
鈥?Enhanced Data Protection
- V
CC
Detector
- Pulse Filter
- Write Inhibit
鈥?5-Volt-Only Operation
鈥?Organized 512x8 JEDEC standard pinout
- 24-pin Dual-In-Line Package
- 32-pin PLCC Package
鈥?Available for Extended Temperature Ranges:
- Commercial: 0擄C to +70擄C
- Industrial: -40擄C to +85擄C
PACKAGE TYPES
DIP
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
鈥?
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
A8
NC
WE
OE
NC
CE
I/O7
I/O6
I/O5
I/O4
I/O3
32
Vcc
31
WE
18
19
28C04A
2
NC
1
NU
4
A7
3
NC
PLCC
A6
A5
A4
A3
A2
A1
A0
NC
I/O0
5
6
7
8
9
10
11
12
13
30
NC
29
A8
28
NC
27
NC
26
NC
25
OE
24
NC
23
CE
22
I/O7
21
I/O6
20
28C04A
14
15
16
鈥?/div>
Pin 1 indicator on PLCC on top of package
BLOCK DIAGRAM
I/O0
I/O7
DESCRIPTION
The Microchip Technology Inc. 28C04A is a CMOS 4K
non-volatile electrically Erasable and Programmable
Read Only Memory (EEPROM). The 28C04A is
accessed like a static RAM for the read or write cycles
without the need of external components. During a
鈥渂yte write鈥? the address and data are latched inter-
nally, freeing the microprocessor address and data bus
for other operations. Following the initiation of write
cycle, the device will go to a busy state and automati-
cally clear and write the latched data using an internal
control timer. To determine when a write cycle is com-
plete, the 28C04A uses Data polling. Data polling
allows the user to read the location last written to when
the write operation is complete. CMOS design and pro-
cessing enables this part to be used in systems where
reduced power consumption and reliability are
required. A complete family of packages is offered to
provide the utmost flexibility in applications.
V
SS
V
CC
CE
OE
WE
Data Protection
Circuitry
Chip Enable/
Output Enable
Control Logic
Auto Erase/Write
Timing
I/O1
I/O2
Vss
NU
I/O3
I/O4
I/O5
17
Data
Poll
Input/Output
Buffers
Program Voltage
Generation
A0
L
a
t
c
h
e
s
A8
Y
Decoder
Y Gating
X
Decoder
4K bit
Cell Matrix
餂?/div>
2004 Microchip Technology Inc.
DS11126H-page 1

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