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1P1G125QDCKRQ1 Datasheet

  • 1P1G125QDCKRQ1

  • SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

  • 102.71KB

  • 8頁

  • TI

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SGES002A 鈭?APRIL 2003 鈭?REVISED MAY 2004
SN74LVC1G125 Q1
SINGLE BUS BUFFER GATE
WITH 3 STATE OUTPUT
D
Qualification in Accordance With
AEC-Q100
鈥?/div>
D
I
off
Supports Partial-Power-Down Mode
Operation
D
Qualified for Automotive Applications
D
Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
D
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
D
ESD Protection Exceeds JESD 22
鈭?2000-V Human-Body Model (A114-A)
鈭?200-V Machine Model (A115-A)
鈭?1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
D
Available in the Texas Instruments
D
D
D
D
D
NanoStar錚?and NanoFree錚?Packages
Supports 5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 3.7 ns at 3.3 V
Low Power Consumption, 10-碌A Max I
CC
鹵24-mA
Output Drive at 3.3 V
OE
A
GND
1
2
3
5
4
V
CC
Y
鈥?Contact factory for details. Q100 qualification data available on
request.
description/ordering information
This bus buffer gate is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable
(OE) input is high.
NanoStar錚?and NanoFree錚?package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE鈥?/div>
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
鈭?0擄C to 125擄C SOT (SC-70) 鈭?DCK
Reel of 2875
1P1G125QDCKRQ1
CM_
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
摟 DCK: The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
OE
L
L
H
A
H
L
X
OUTPUT
Y
H
L
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
2004, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

1P1G125QDCKRQ1 產品屬性

  • 1

  • 集成電路 (IC)

  • 邏輯 - 緩沖器,驅動器,接收器,收發(fā)器

  • 74LVC

  • 緩沖器/線路驅動器,非反相

  • 1

  • 1

  • 24mA,24mA

  • 1.65 V ~ 5.5 V

  • -40°C ~ 125°C

  • 表面貼裝

  • 6-TSSOP(5 引線),SC-88A,SOT-353

  • SC-70-5

  • Digi-Reel®

  • 296-18348-6

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