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100341QC Datasheet

  • 100341QC

  • Low Power 8-Bit Shift Register

  • 9頁

  • FAIRCHILD

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100341 Low Power 8-Bit Shift Register
July 1988
Revised August 2000
100341
Low Power 8-Bit Shift Register
General Description
The 100341 contains eight edge-triggered, D-type flip-flops
with individual inputs (P
n
) and outputs (Q
n
) for parallel
operation, and with serial inputs (D
n
) and steering logic for
bidirectional shifting. The flip-flops accept input data a
setup time before the positive-going transition of the clock
pulse and their outputs respond a propagation delay after
this rising clock edge.
The circuit operating mode is determined by the Select
inputs S
0
and S
1
, which are internally decoded to select
either 鈥減arallel entry鈥? 鈥渉old鈥? 鈥渟hift left鈥?or 鈥渟hift right鈥?as
described in the Truth Table. All inputs have 50 k
鈩?/div>
pull-
down resistors.
Features
s
35% power reduction of the 100141
s
2000V ESD protection
s
Pin/function compatible with 100141
s
Voltage compensated operating range
= 鈭?/div>
4.2V to
鈭?/div>
5.7V
s
Available to industrial grade temperature range
Ordering Code:
Order Number
10034SC
100341PC
100341QI
100341QC
Package Number
M24B
N24E
V28A
V28A
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
鈭?/div>
40
擄
C to
+
85
擄
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP/SOIC
Pin Descriptions
Pin Names
CP
S
0
, S
1
D
0
, D
7
P
0
鈥揚(yáng)
7
Q
0
鈥換
7
Description
Clock Input
Select Inputs
Serial Inputs
Parallel Inputs
Data Outputs
28-Pin PLCC
漏 2000 Fairchild Semiconductor Corporation
DS009880
www.fairchildsemi.com

100341QC 產(chǎn)品屬性

  • Fairchild Semiconductor

  • 計(jì)數(shù)器移位寄存器

  • Serial/Parallel to Parallel

  • 4

  • PLCC-28

  • 100

  • ECL

  • 2 / 8

  • 1.8 ns

  • + 85 C

  • 0 C

  • Tube

  • 8 Bit Shift Register

  • SMD/SMT

  • 8

  • - 5.7 V to - 4.2 V

  • 35

  • 5.7 V

100341QC相關(guān)型號(hào)PDF文件下載

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    Low Power Quint 2-Input OR/NOR Gate
    FAIRCHILD
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    Low Power Quint 2-Input OR/NOR Gate
    NSC
  • 英文版
    Low Power Quint 2-Input OR/NOR Gate
    NSC [Natio...
  • 英文版
    Low Power Quint 2-Input OR/NOR Gate
    FAIRCHILD ...
  • 英文版
    Low Power Quint AND/NAND Gate
    FAIRCHILD
  • 英文版
    Low Power Quint AND/NAND Gate
    NSC
  • 英文版
    Low Power Quint AND/NAND Gate
    NSC [Natio...
  • 英文版
    Low Power Quint AND/NAND Gate
    FAIRCHILD ...
  • 英文版
    Low Power Quint Exclusive OR/NOR Gate
    FAIRCHILD
  • 英文版
    Low Power Quint Exclusive OR/NOR Gate
    NSC

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