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DM74125N Datasheet

  • DM74125N

  • Quad TRI-STATE Buffers

  • 101.72KB

  • 4頁

  • NSC

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54125 DM54125 DM74125 Quad TRI-STATE Buffers
June 1989
54125 DM54125 DM74125
Quad TRI-STATE Buffers
General Description
This device contains four independent gates each of which
performs a non-inverting buffer function The outputs have
the TRI-STATE feature When enabled the outputs exhibit
the low impedance characteristics of a standard TTL output
with additional drive capability at the high Logic level to per-
mit the driving of bus lines without external pull-up resistors
When disabled both the output transistors are turned off
presenting a high-impedance state to the bus line Thus the
output will act neither as a significant load nor as a driver
To minimize the possibility that two outputs will attempt to
take a common bus to opposite logic levels the disable time
is shorter than the enable time of the outputs
Features
Y
Alternate Military Aerospace device (54125) is avail-
able Contact a National Semiconductor Sales Office
Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL F 6540 鈥?1
Order Number 54125DMQB 54125FMQB DM54125J DM54125W or DM74125N
See NS Package Number J14A N14A or W14B
Function Table
Y
e
A
Inputs
A
L
H
X
C
L
L
H
Output
Y
L
H
Hi-Z
H
e
High Logic Level
L
e
Low Logic Level
X
e
Either Low or High Logic Level
Hi-Z
e
TRI-STATE (Outputs are disabled)
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 6540
RRD-B30M105 Printed in U S A

DM74125N 產(chǎn)品屬性

  • 25

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 7400

  • 緩沖器/線路驅(qū)動器，非反相

  • 4

  • 1

  • 5.2mA，16mA

  • 4.75 V ~ 5.25 V

  • 0°C ~ 70°C

  • 通孔

  • 14-DIP（0.300"，7.62mm）

  • 14-DIP

  • 管件

  • 7412574125N80938093NDM8093DM8093N

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